using logic write in wave example

[ywu]

I tried to set the Config 0x3 to turn on invsinc for DAC.

I set addr to 0x6 and data to 0x4381, and click on the the logic write button on the debug manual of X5-400M wave example.

When I transmit through DAC, I do not see any invsinc correction on the DAC's output.

Please advise!

Thanks,

[jhenderson]

Modification of the D/A configuration must occur after streaming is underway, since the Malibu libraries initialize the D/A registers as streaming starts. See the method X5_400MOutputDevice::ConfigureHardware() within the file X5_400MDeviceMap_Mb.cpp for details on the initialization performed by Malibu.

Use the X5_400M::Output().Spi() property to write to the D/A registers within the ApplicationIo::HandleAfterStreamStart() event callback to initialize any registers to non-default values.

[ywu]

Jim, Thanks,

I just set the FsincEnable to true in X5_400MDeviceMap_Mb.cpp in the initialization.

[jhenderson]

I do not recommend that you make changes to the Malibu libraries directly. Your changes will not be incorporated into the next release unless it is universally applicable and this change does not meet that criteria. It would be better for you to apply the change in AfterStreamStart.

[ywu]

I tried Module::Output().Spi(0x3,0x1) and then SpiDump() in HandleAfterStreamStart. It still does not turn on the invsinc.

But the SpiDump gave the addr from 24 to 31.

[jhenderson]

I am not sure why

[ywu]

I tried all; it did not turn invsinc on.

When Spi(0x01,0x00), Spi(0x02,0x10), and Spi(0x03,0x81), in return, Spi(0x01), Spi(0x02), and Spi(0x03), all returns the same value 0x81. That's strange.

We know our fpga bit image has zero timing error.

[jhenderson]

The software call mentioned above is known to work with the stock firmware. You are encouraged to reload the stock logic and test this feature. Assuming it works with the factory logic, try recompiling the stock factory firmware without modification and verify that the SPI functionality remains.

If both of the above tests work, we must conclude that some defect exists in your custom firmware.

[ywu]

I turned off the PC and power back on to load the factory image.

The Spi does the same thing again.

[jhenderson]

The Spi readback function is not operational on the stock factory firmware. This is a known limitation. But, the Malibu libraries use the Spi() write method to initialize the D/A device during stream start configuration.

In addition, we successfully used the sinc filter enable within a recent custom application to meet a customer requirement. So, this feature was known to be viable at that time.

[bkao]

You can turn on CONFIG2 bit 0 to enable invsinc.

If you are not doing interpolation, set CONFIG1 bit 1:0 to be "10". So that you disable FIR1, FIR2, FIR3, and keep FIR4 active for invsinc function.

Billy

[ywu]

I have the rev a and b X5-400M boards here.

Should they be hardware-wise OK?

The only concern is the firmware, right? Or any other issues on the Wave and Malibu?

Thanks,

V/R,

[ywu]

Typos:

I have the rev a and "c" X5-400M boards here.

[jhenderson]

Both boards should work ok in this regard, assuming use of the stock firmware. Use x5_400m_routed.bit dated 9/22/09 5:51p from the Images\RevB folder and the latest beta software from the website.

[ywu]

I downloaded the exact bit image, and Wave still Spi the wrong value.

I'm puzzled at the DAC setup. We have a sysclk of 200 MHz from the FPGA side that generates 200 Msps data, and on the other hand a crystal feeds an independent 400 MHz clk to DAC. The default mode of DAC is X2. So the 200 Msps data will be up-sampled to 400 Msps that will match DAC's 400 MHz clock.

But the DAC input FIFO is clocked at 400 MHz. So should we turn off all the FIR filters including FIR3 in X3 mode as bkao suggested?